deep-roots learning program · module 17

Module 17 — Digital hardware: from transistors to silicon

Every chapter: first principles, What insiders know, a See it yourself lab, connections, and a quiz with worked answers.

01

From transistors to gates

MOSFETs, CMOS, RC delay, the power equation — the physics under every claim in this program.

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02

State and the pipeline

Flip-flops from first principles, setup/hold, hazards, the 5-stage CPU.

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03

RTL: the other discipline

Verilog as description not program — the FIFO ring in ~40 lines.

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04

The cache in RTL: a tiny CPU's memory system

The 6T cell, a direct-mapped cache in RTL, DRAM timing — module 01 ch02, rebuilt.

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05

From RTL to silicon: the economics of hardware

The foundry model, yield arithmetic, chiplets — why hardware decisions are money decisions.

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the exam
fin

Module 17 final exam

Every chapter, worked answers behind the fold.

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